1. Field of the Invention
The present invention relates to a light exposure technology, and in particular to a reticle for determining an overlay error taking an influence by aberration into consideration, a method of determining an overlay error with the reticle, and a mark for determining an overlay error.
2. Description of the Background Art
In recent years, a semiconductor device is formed of a plurality of layers, and it has been tried to reduce sizes of elements forming the semiconductor device. In view of this, an overlay error of elements formed at respective layers of the semiconductor device is of increasing importance. As the sizes of elements have been reduced, it is now impossible to ignore an influence on light exposure by aberration in an optical system.
The overlay error can be classified into the following types.
(1) Overlay error: overlay error in general meaning.
(2) Alignment error: alignment errors in X, Y and .theta. at a chip after alignment.
(3) Stability and relative error of a device: an error caused by an aligner itself.
(4) Mask error: pattern location error from an ideal point of a mask angular coordinate point.
(5) Error by thermal expansion of a mask: overlay error caused by thermal expansion of a mask in an aligner.
(6) Other errors: errors such as an error caused by bending during fixing of a mask and a wafer, and non-linear distortion caused by high-temperature processing of a wafer.
As described above, overlay errors are caused by various factors, but the overlay error of the above item (1) will be described below.
An overlay error determination mark used for determining the overlay error will now be described below in connection with an MOS (Metal Oxide Semiconductor) transistor forming a memory cell of a DRAM (Dynamic Random Access Memory).
FIG. 15 is a cross section schematically showing a general structure of an MOS transistor. FIG. 16 is a plan schematically showing a structure of a semiconductor device including the MOS transistor in FIG. 15.
Referring to FIG. 15, an MOS transistor has a pair of source/drain regions 7, a gate insulating layer 2 and a gate electrode layer 6. Paired source/drain regions 7 are formed at a surface of a semiconductor substrate 1 with a space between each other. Gate electrode layer 6 is formed at a region between paired source/drain regions 7 with gate insulating layer 2 therebetween.
Gate electrode layer 6 is covered with an interlayer insulating layer 3. A contact hole 3a reaching a portion of a surface of the source/drain region is formed at interlayer insulating layer 3 and gate electrode layer 2. There is formed a bit line 5 which is electrically connected to source/drain region 7 through contact hole 3a.
Referring mainly to FIG. 16, each gate electrode layer 6 in the DRAM is integral with the word line and extends in a direction Y in the figure. Each bit line 5 extends perpendicularly to word line 6, i.e., in a direction X in the figure.
It is now assumed that word lines 6 and bit lines 5 each have a width of 0.4 .mu.m, and are spaced from each other by a space of 1 .mu.m.
In the DRAM, a storage node (lower electrode) is connected to source/drain region 7 of the MOS transistor through a contact hole 10. Generally, contact hole 10 is formed at a region 10A defined between word lines 6 and bit lines 5. It is assumed that contact hole 10 has an opening of 0.5 .mu.m by 0.5 .mu.m. If respective members 5, 6 and 10 are formed and overlaid accurately in accordance with a design, a distance X in the direction X between word line 6 and contact hole 10 equals to 0.25 .mu.m, and a distance Y in the direction Y between bit line 5 and contact hole 10 also equals to 0.25 .mu.m.
However, contact hole 10 may be opened at a shifted position as shown by alternate long and short dash line in the figure due to an overlay error. In this case, word line 6 or bit line 5 may be exposed through a side wall of contact hole 10. This results in such a disadvantage that, when the storage node is formed along the inner wall of contact hole 10, the storage node is short-circuited to word line 6 or bit line 5.
Contact hole 10 is formed in the following process. As shown in FIG. 15, a resist film 9 formed on an interlayer insulating layer 8 is patterned to have a contact hole pattern by a photolithography, and etching is performed to form contact hole 10 using patterned resist film 9 as a mask.
Therefore, in the stage that the patterning of resist film 9 is completed, processing is performed to determine a positional shift between the position of the contact hole pattern formed at resist film 9 and the position of word line 6 or bit line 5. If it is determined that the contact hole pattern is not precisely located in resist film 9, it is required only to form resist film 9 again.
However, contact hole 10 and word line 6 are spaced only by a very small space of 0.25 .mu.m, and also contact hole 10 and bit line 5 are spaced only by a very small space of 0.25 .mu.m. Therefore, it is difficult to determine an overlay error at these regions.
Accordingly, an overlay error determination mark is used as a dummy pattern for determining the overlay error. The overlay error determination mark is formed at a peripheral region, where a semiconductor device is to be formed, simultaneously with formation of the word line, bit line and resist film. The overlay error of the contact hole pattern at the resist film with respect to the word line and bit line can be determined by determining the overlay error of the overlay error determination mark.
Now, the overlay error determination mark will be described below.
FIG. 17 is a schematic cross section showing arrangement of an overlay error determination mark. Referring to FIG. 17, a first determination mark 301 located at a peripheral region of the semiconductor device is formed at a predetermined position on gate insulating layer 2 simultaneously with processing of forming word line 6. Thus, first determination mark 301 is formed from the same layer as word line 6. First determination mark 301 has a substantially square planar form of 25 .mu.m by 25 .mu.m.
Simultaneously with formation of bit line 5, a second determination mark 302 is formed at a predetermined position on interlayer insulating layer 3. Thus, second determination mark 302 is formed from the same layer as bit line 5. Similarly to first determination mark 301, second determination mark 302 has a substantially square planar form of 25 .mu.m by 25 .mu.m.
Simultaneously with the patterning of resist film 9, third and fourth determination marks 303a and 303b are formed on interlayer insulating layer 8 and thus are located above first and second determination marks 301 and 302, respectively. Each of third and fourth determination marks 303a and 303b has a square planar form of 15 .mu.m by 15 .mu.m.
The overlay error determination mark thus constructed is of a so-called a Box-in-Box type. Each of first, second, third and fourth determination marks 301, 302, 303a and 303b has a square planar form as described above, because this is required by an overlay inspecting device (e.g., KLA5011 manufactured by KLA corp.). This overlay inspecting device is designed to recognize positions of sides of squares. It is also required that each side of first and second determination marks 301 and 302 has a length of 15 to 30 .mu.m, and that each side of third and fourth determination marks 303a and 303b has a length of 7.5 to 15 .mu.m. According to the current technology, it is impossible to inspect overlay error with sizes smaller than the above values.
Then, a method of determining a pattern overlay error will be described below in connection with the above first and third determination marks.
FIG. 18A is a plan showing an overlay error determination mark of the Box-in-Box type which is formed of the first and third determination marks. FIG. 18B is a schematic cross section taken along line 18B--18B in FIG. 18A, and FIG. 18C shows light and shade of a detection signal taken along line 18B--18B in FIG. 18A.
Referring to FIGS. 18A, 18B and 18C, the detection signal represents darkness peaks at side walls 311a, 311b, 312a and 312b of first and third determination marks 301 and 303a. The positions of side walls of first and third determination marks 301 and 303a can be determined based on the light and shade represented by the detection signal. Based on the positions of the respective side walls, it is possible to determine the overlay error between the bit line and the contact hole pattern at the resist film, as will be described later.
FIG. 19 is a plan showing arrangement of the first and third determination marks including an overlay error.
Referring to 19, determination of the overlay error is conducted as follows. First, a distance a between side walls 311a and 312a and a distance b between side walls 311b and 312b are derived from determined positions of the side walls of respective marks 301 and 303a. A shift quantity or length between second and fourth determination marks 302 and 303b is calculated from distances a and b. More specifically, the shift quantity is calculated from a formula of (a-b)/2. The shift quantity between first and third determination marks 301 and 303a corresponds in one-to-one relationship to a shift quantity between word line 6 and the contact hole pattern at resist film 9, and can be considered directly as the overlay error.
The shift quantity between second and fourth determination marks 302 and 303b can be determined in a similar manner.
In connection with FIGS. 18A, 18B, 18C and FIG. 19, description has been given on a structure in which both of first and third determination marks 301 and 303a are formed of solid or remained patterns. However, an overlay error can be similarly determined even in a structure wherein both of first and third determination marks 301 and 303a are formed of hollow or removed patterns as shown in FIGS. 20A, 20B and 20C.
In accordance with reduction of sizes of patterns in a semiconductor device, however, such a situation begins that aberration exerts a remarkable influence on determination of overlay error described above. An influence by aberration causes such a problem that the shift quantity determined from the overlay error determination mark does not correspond in one-to-one relationship to the actual shift quantity between the word line (or bit line) and the contact hole.
Aberration will now be briefly described below.
Ideal imaging in an optical system requires the followings:
(a) Light beams point-symmetrically emitted from an object point are joined point-symmetrically at an image point.
(b) A planar object forms a planar image.
(c) A lateral magnification is constant throughout an image plane.
The above conditions are required to be satisfied for monochromatic light, but are also desired to be satisfied for polychromatic light (white light). Shift or deviation from this ideal imaging conditions is called the aberration.
Aberration caused by a situation departing from the condition of the item (a) is called spherical aberration, astigmatism or coma aberration.
Aberration caused by a situation departing from the condition of the item (b) is called field curvature aberration.
Aberration caused by a situation departing from the condition of the item (c) is called curvature aberration.
Here, description will be given on the coma aberration, which exerts the largest influence on the determination of overlay error related to the invention.
FIG. 21A shows a sectional structure of a reticle, FIG. 21B shows a distribution of light intensity of exposure light passed through the reticle, and FIG. 21C shows a resist film patterned by the exposure light.
Referring to FIGS. 21A and 21B, a reticle 405a has a transparent substrate 401 and a shade film 402a. A region on transparent substrate 401 covered with shade film 402a forms a light intercepting region, and a region not covered with shade film 402a forms a light transmitting region. Shade film 402a forms a removed pattern 403a on transparent substrate 401 of reticle 405a.
Exposure light 450 irradiated toward reticle 405a would have a light intensity on resist film 422a as represented by solid line 411a, if no influence were exerted. However, due to the influence by coma aberration, the light intensity remarkably shifts only in one direction, and only a right-hand portion of solid line 411a exhibits a light intensity as shown in dotted line 412a.
Consequently, as shown in FIG. 21C, a hole pattern of a size L2 is formed at resist film 422a, at which a hole pattern of a size L1 (L2&gt;L1) would be formed.
The influence by coma aberration is exerted not only on removed pattern 403a of the reticle shown in FIG. 21A but also on a remained pattern 403b of the reticle shown in FIGS. 22A, 22B and 22C. This will be described below.
FIG. 22A shows a sectional structure of the reticle, FIG. 22B shows a distribution of light intensity of exposure light passed through the reticle, and FIG. 22C shows a resist film patterned by the exposure light.
Referring to FIGS. 22A and 22B, a shade film 402b forming a remained pattern 403b is formed on transparent substrate 401 of a reticle 405b. Exposure light 450 passed through reticle 405b would have a light intensity on resist film 422b as represented by solid line 411b, if no influence were exerted. However, due to the influence by coma aberration, the light intensity shifts only in one direction, and only a left-hand portion of solid line 411b exhibits a light intensity as shown in dotted line 412b.
Consequently, as shown in FIG. 22C, a pattern of a size L4 remains at resist film 422b, at which a pattern of a size L3 should remain.
As shown in FIGS. 21A, 21B and 21C as well as FIGS. 22A, 22B and 22C, coma aberration exerts an influence on either of the remained and removed patterns in reticles. The influence by coma aberration increases as the size of pattern decreases. Thus, a shift quantity due to coma aberration increases as the size of pattern decreases. This will be described below.
Shift of a wave front caused by coma aberration is large at a peripheral portion of a lens and is small at a central portion. From results of analysis by experiments and simulations, it has been known that diffracted rays of a large pattern are not significantly affected by coma aberration because they have a small diffraction angle and pass through a central region of a pupil causing less wave front aberration, so that misregistration is suppressed.
Meanwhile, a small pattern allows passage of high-frequency light to a larger extent than a large pattern. High-frequency light is liable to be affected by a diffraction phenomenon of a lens. Therefore, the rays diffracted by a small pattern have a large diffraction angle, and pass through a peripheral region of a pupil causing a large wave front aberration, so that coma aberration exerts a large influence on them, and significant misregistration of the pattern occurs.
More specific description will now be given with reference to FIGS. 23A, 23B and 23C.
Referring to FIGS. 23A, 23B and 23C, a reticle 405d has a removed pattern (light transmitting portion) 403d.sub.1 forming a large pattern and a removed pattern (light transmitting portion) 403d.sub.2 forming a small pattern. Exposure light 450 passed through reticle 405d would have a light intensity on resist film 422d as represented by solid lines 411a and 411b, if no influence were exerted. However, due to the influence by coma aberration, the light intensity shifts only in one direction, and only left-hand portions of solid lines 411a and 411b exhibit light intensities as shown in dotted lines 412a and 412b.
As already described, a smaller pattern causes a larger influence by coma aberration, so that the small pattern causes a larger shift quantity along one direction in the light intensity than the large pattern.
Consequently, as shown in FIG. 23C, the shift quantity (L6-L5) of hole pattern (small pattern) 422d.sub.2 at resist film 422d is larger than the shift quantity (L8-L7) of hole pattern (large pattern) 422d.sub.1.
Although the sizes of first and third determination marks 301 and 303a forming the conventional overlay error determination mark shown in FIG. 18 are restricted due to restriction of a measuring device, patterns (word line, bit line, contact hole and others) in the semiconductor device have been and will be miniaturized to a higher extent. Therefore, it can be considered that the overlay error determination mark corresponds to the large pattern described above, and the pattern in the semiconductor device corresponds to the small pattern.
Therefore, even if the overlay error is determined, the influence exerted by coma aberration at the overlay error determination mark differs from the influence exerted by coma aberration at the pattern in the semiconductor device. Accordingly, one-to-one relationship does not exist between the overlay error obtained from the overlay error determination mark and the actual overlay error of the patterns in the semiconductor device.